The present invention relates to electronic packaging, and more particularly relates to a method and apparatus for mounting a flexible film semiconductor chip carrier on a circuitized substrate such as a printed circuit card or board.
Typically, one or more semiconductor chips, or other such electronic devices, are mounted on a first circuitized substrate (called a semiconductor chip carrier, or, more generally, a first level electronic package), which, in turn, is mounted on a second circuitized substrate, such as a printed circuit card or board (more generally called a second level electronic package). The electronic device(s) mounted on the first level electronic package are electrically connected through the circuitry of the first level package to the circuitry of the second level electronic package. The resulting structure may be used as part of a computer or other such equipment.
A particularly versatile first level electronic package is a flexible film semiconductor chip carrier, for example, as described in U.S. patent application Ser. No. 865,316, entitled "Flexible Film Semiconductor Chip Carrier", which was filed in the United States Patent and Trademark Office on May 21, 1986, which issued as U.S. Pat. No. 4,681,654 on Jul. 21, 1987, and which is assigned to International Business Machines (IBM) Corporation as is the present patent application. Also, see U.S. patent application Ser. No. 009,981, entitled "Full Panel Electronic Packaging Structure and Method of Making Same", which was filed in the United States Patent and Trademark Office on Feb. 2, 1987, and which is also assigned to IBM Corporation. (The entire disclosures of these two United States patent applications are incorporated herein by reference.) This type of first level electronic package comprises a circuitized, flexible substrate, such as a relatively thin sheet of polyimide having a thickness between approximately 5.1 to 7.6 micrometers (about 0.0002 to 0.0003 inch) and having circuitry formed on at least one side of the polyimide sheet. A semiconductor chip, or other such electronic device, may be mounted on pads, such as controlled collapse chip connection (C-4) pads, which are part of the circuitry formed on the polyimide sheet, and then the resulting structure may be mounted on a printed circuit board, or other such second level electronic package.
Conventional techniques such as solder reflow, ultrasonic bonding, or thermal compression bonding may be used to mount the flexible film semiconductor chip carrier on the second level electronic package with the semiconductor chip backbonded to the second level package. However, each of these techniques results in a non-planar ("tent") geometry for the circuitized, flexible film carrying the semiconductor chip, when the flexible film semiconductor chip carrier is mounted on the second level electronic package. Such a tent geometry for the circuitized, flexible film raises reliability concerns because stresses may be imposed on the circuitry on the flexible film, or on joints, such as C-4 joints between the semiconductor chip and C-4 pads on the flexible film, during the process of mounting the film on the second level electronic package, or during subsequent use of the resulting electronic packaging structure. In addition, such a tent geometry for the circuitized, flexible film presents problems such as difficulty in aligning outer bonding pads on the flexible film with mating pads on the second level package, difficulty in making sufficiently strong bonds between the flexible film and the second level package to hold the flexible film in position and prevent it from springing up, difficulty in preventing electrical shorting between the circuitry on the flexible film and the edges of the semiconductor chip over which the film is draped, and difficulty in adequately cleaning under the film once it is in position on the second level electronic package.
A planar geometry for the circuitized, flexible film is very desirable since it eliminates or alleviates the foregoing concerns and problems, and one solution is to provide a cavity in the second level electronic package which accommodates the semiconductor chip mounted on the circuitized, flexible film, thereby allowing the flexible film to assume the desired planar geometry. However, this solution is not particularly desirable since, for example, it decreases the wireability of the second level package. Also, placing the semiconductor chip in a cavity presents a flux cleaning problem.